The Basic Differential Amplifier 

The circuit on the left is a variation on the Wheatstone Bridge, where we have replaced the lower two resistors with transistors and added an external resistor, R_{E}, to help limit the current through the bridge. The same circuit appears to the right, redrawn in a more conventional format. The only other change is that we have defined separate positive (+V_{CC}) and negative (V_{EE}) power supplies, so we can reference the the input voltages to a common ground.
If both inputs are grounded, the emitters of the two transistors will be at a voltage of V_{BE}. This sets the current through R_{E} in accordance with Ohm's Law. Q1 and Q2 are normally matched, so half of the current through R_{E} flows through Q1, and the other half flows through Q2. Since R_{C1} and R_{C2} are also matched, the output voltages will be the same. The bridge is balanced at this point.
Ideally, if both inputs remain at the same voltage as each other, the output voltages will not only be identical, but they shouldn't change. On the other hand, if the input voltages are different from each other, the bridge will become unbalanced, and the output voltages will be unequal. This is important in practical applications, especially when amplifying a signal in a noisy environment. Typically the desired signal will appear as an input difference, while the environmental noise will be applied equally to both inputs. We want to amplify the desired signal while cleaning up the noise as much as possible.
Unfortunately, this is not an ideal circuit. Nevertheless, it is well worth examining the behavior of the circuit under different conditions.
To help describe the behavior of this circuit, we will assign typical voltages, parameters, and component values as follows:
Now, let's connect IN1 to IN2 and then see what happens if we apply different voltages to both inputs together. This is known as common mode operation, because whatever we apply is common to both inputs. The obvious starting point is to ground the inputs. In this case:
OK, that value of 6.38 V for V_{C} is quite reasonable as the quiescent operating point for the transistors in this circuit. It's close to half the value of +V_{CC} (12 V), which allows for a wide available range for collector voltage to change. Now we need to detemine what will happen to the circuit if the common input voltage changes. We must run through the same exercise for several input voltages to do this, so let's see how an input voltage of +1 V will affect the circuit:
This isn't good. While we still have a null condition between the two outputs, a commonmode input voltage of +1 V has caused the outputs to change by 0.5 V. Ideally, they shouldn't change at all. Since they do, let's build a table showing the results of this exercise for all commonmode input voltages over a ±5 V range. In this table, V_{IN}(CM) = (V_{IN1} + V_{IN2})/2 and V_{OUT} = (V_{OUT1} + V_{OUT2})/2.
V_{IN}(CM) (Volts)  V_{E} (Volts)  I_{E} (mA)  I_{E1} (mA)  I_{C1} (mA)  V_{OUT} (Volts) 

+5  4.3  1.63  0.815  0.8109  3.891 
+4  3.3  1.53  0.765  0.7612  4.388 
+3  2.3  1.43  0.715  0.7114  4.886 
+2  1.3  1.33  0.665  0.6617  5.383 
+1  0.3  1.23  0.615  0.6119  5.881 
0  0.7  1.13  0.565  0.5622  6.378 
1  1.7  1.03  0.515  0.5124  6.876 
2  2.7  0.93  0.465  0.4627  7.373 
3  3.7  0.83  0.415  0.4129  7.871 
4  4.7  0.73  0.365  0.3632  8.368 
5  5.7  0.63  0.315  0.3134  8.866 
Now we can clearly see the problem posed by commonmode input signals. Any such signal changes the operating point of the transistors. At +4 volts the transistors are close to saturation before any desired signal is applied at all. At +5 volts, both transistors are in saturation and the circuit cannot function. On the negative side, commonmode inputs will reduce the overall circuit current, thus beginning to starve both transistors and reduce their operating range.
The result is that varying commonmode signals will affect the operation of the circuit, and may well cause significant distortion of the signal we really want to keep.
We calculate the commonmode voltage gain (A_{CM}) of the circuit as ΔV_{OUT}/ΔV_{IN}. From the table above, we note that a 1volt change in V_{IN} causes a change of 0.497 volt in V_{OUT} of both transistors. Therefore the commonmode gain of this circuit is 0.497, and is often generalized as 0.5. This is actually very poor for a differential amplifier; we want to get it down to zero, or as close to zero as we can manage.
The basic circuit has been duplicated to the right for easy reference. For difference mode, V_{IN} = V_{IN1}  V_{IN2}, and V_{OUT} = V_{OUT1}  V_{OUT2}. We can easily accomplish this by grounding IN2 and applying an input voltage to IN1. To get a feel for circuit operation in this mode, we'll start by applying +1 V to V_{IN1}:
From these calculations, we note two immediate problems. First, by applying an input voltage higher than +V_{BE} as V_{IN1}, we have cut off Q2 completely, so that part of the circuit has no effect; and second, that we have overdriven Q1 so it is in saturation. Clearly we have driven this circuit outside of its useful range of operation. We should expect similar results by applying 1 V to V_{IN1}, but we should verify that:
Well! As we expected, driving IN1 more negative than V_{BE}, we forced Q1 off, and all current flowed through Q2. However, we found less total current in this calculation. As a result, Q2 is close to saturation, but hasn't quite gotten there. This difference is due to the common mode behavior of the circuit.
If we keep the two inputs within ±V_{BE} of each other, both transistors will conduct some current and the circuit will work properly. A practical limit for V_{IN1} might be ±0.5 volts. That will ensure that we keep both transistors operating properly. However, it also means that we cannot assume V_{BE} is the same for both transistors. Therefore we must make use of the exponential relationship between V_{BE} and I_{C} to determine the collector currents of the two transistors:
I_{C1}  =  αI_{E} 


1 + ε^{q(VIN2  VIN1)/kT }  
I_{C2}  =  αI_{E} 


1 + ε^{q(VIN1  VIN2)/kT } 
In these equations,
We should also note that the expression kT/q defines the thermal voltage, V_{T}, of a PN junction at any temperature T.
The first problem here is to determine the actual value of V_{E}. It is of course the same for both transistors, even though V_{B1} ≠ V_{B2}. The best we can do at this point is to use the average of the two base voltages and then subtract V_{BE}. This means we are using V_{IN}(CM) to find V_{E}, which seems a reasonable starting point. Using this approach, let's see what happens when V_{IN1} varies over a range of ±0.5 V (we will use a temperature T of 68°F = 20°C = 293.15°K):
V_{IN1}  V_{IN}(CM)  V_{E}  I_{E}  I_{C1}  I_{C2}  V_{OUT1}  V_{OUT2}  V_{OUT}  Gain 

+0.5 V  +0.25 V  0.45 V  1.155 mA  1.149 mA  2.916 × 10^{9} mA  0.51  12 V  11.49 V  22.98 
+0.4 V  +0.20 V  0.50 V  1.15 mA  1.144 mA  1.521 × 10^{7} mA  0.56 V  11.999998 V  11.44 V  28.6 
+0.3 V  +0.15 V  0.55 V  1.145 mA  1.139 mA  7.930 × 10^{6} mA  0.61 V  11.999981 V  11.39 V  37.97 
+0.2 V  +0.10 V  0.60 V  1.14 mA  1.134 mA  4.134 × 10^{4} mA  0.66 V  11.996 V  11.336 V  56.68 
+0.1 V  +0.05 V  0.65 V  1.135 mA  1.108 mA  0.02116 mA  0.92 V  11.79 V  10.87 V  108.7 
+0.09 V  +0.045 V  0.655 V  1.1345 mA  1.0977 mA  0.0311 mA  1.023 V  11.689 V  10.666 V  118.5 
+0.08 V  +0.04 V  0.66 V  1.134 mA  1.0876 mA  0.0456 mA  1.124 V  11.544 V  10.420 V  130.2 
+0.07 V  +0.035 V  0.665 V  1.1335 mA  1.0614 mA  0.0665 mA  1.386 V  11.335 V  9.949 V  142.1 
+0.06 V  +0.03 V  0.67 V  1.133 mA  1.0314 mA  0.0959 mA  1.686 V  11.041 V  9.355 V  155.9 
+0.05 V  +0.025 V  0.675 V  1.1325 mA  0.9901 mA  0.1368 mA  2.099 V  10.632 V  8.533 V  170.7 
+0.04 V  +0.02 V  0.68 V  1.132 mA  0.9345 mA  0.1918 mA  2.655 V  10.082 V  7.427 V  185.7 
+0.03 V  +0.015 V  0.685 V  1.1315 mA  0.8628 mA  0.2631 mA  3.372 V  9.369 V  5.996 V  199.9 
+0.02 V  +0.01 V  0.69 V  1.131 mA  0.7745 mA  0.3509 mA  4.255 V  8.491 V  4.236 V  211.8 
+0.01 V  +0.005 V  0.695 V  1.1305 mA  0.6723 mA  0.4526 mA  5.277 V  7.474 V  2.198 V  219.8 
0.0 V  0.0 V  0.70 V  1.13 mA  0.5622 mA  0.5622 mA  6.378 V  6.378 V  0.0 V   
0.01 V  0.005 V  0.705 V  1.1295 mA  0.4522 mA  0.6717 mA  7.478 V  5.283 V  2.196 V  219.6 
0.02 V  0.01 V  0.71 V  1.129 mA  0.3503 mA  0.7731 mA  8.497 V  4.269 V  4.228 V  211.4 
0.03 V  0.015 V  0.715 V  1.1285 mA  0.2624 mA  0.8605 mA  9.376 V  3.395 V  5.980 V  199.3 
0.04 V  0.02 V  0.72 V  1.128 mA  0.1912 mA  0.9312 mA  10.088 V  2.688 V  7.401 V  185.0 
0.05 V  0.025 V  0.725 V  1.1275 mA  0.1362 mA  0.9857 mA  10.638 V  2.143 V  8.495 V  169.9 
0.06 V  0.03 V  0.73 V  1.127 mA  0.0954 mA  1.0260 mA  11.046 V  1.740 V  9.305 V  155.1 
0.07 V  0.035 V  0.735 V  1.1265 mA  0.0660 mA  1.0549 mA  11.046 V  1.740 V  9.305 V  141.3 
0.08 V  0.04 V  0.74 V  1.126 mA  0.0453 mA  1.0751 mA  11.547 V  1.249 V  10.298 V  128.7 
0.09 V  0.045 V  0.745 V  1.1255 mA  0.0309 mA  1.0890 mA  11.691 V  1.110 V  10.581 V  117.6 
0.1 V  0.05 V  0.75 V  1.125 mA  0.02097 mA  1.098 mA  11.79 V  1.02 V  10.77 V  107.7 
0.2 V  0.10 V  0.80 V  1.12 mA  4.061 × 10^{4} mA  1.114 mA  11.996 V  0.86 V  11.136 V  55.68 
0.3 V  0.15 V  0.85 V  1.115 mA  7.722 × 10^{6} mA  1.109 mA  11.999923 V  0.91 V  11.089923 V  36.966 
0.4 V  0.2 V  0.90 V  1.11 mA  1.468 × 10^{7} mA  1.104 mA  11.999999 V  0.96 V  11.04 V  27.6 
0.5 V  0.25 V  0.95 V  1.105 mA  2.790 × 10^{9} mA  1.0995 mA  12 V  1.005 V  10.995  21.99 
From this table, three things become evident. First, if the input voltages differ by more than about ±0.1 V, one transistor is essentially cut off, and the other conducts nearly all of the available current. Second, circuit behavior is not symmetrical for positive versus negative inputs. Nevertheless, as long as the input voltages are close enough together, the transistors will both conduct some current, and the circuit will significantly amplify the voltage difference. Third, the gain of this circuit is not fixed, but rather changes according to the magnitude of the voltage difference between the two inputs.
So far we've looked at how this circuit handles common mode signals, and how it handles differential signals. Now we need to put those two parts together. After all, the reason for using this circuit is to amplify a desired signal while ignoring the undesirable noise that might otherwise swamp that signal. Accordingly, we need a means to determine how well the circuit accomplishes that requirement. The result is expressed in decibels, and is known as the common mode rejection ratio (CMRR). Mathematically,
In this expression,
To determine the common mode gain (A_{cm}), we must determine how much the common mode output voltage has changed from its value when there is no common mode input. From the table above, we see that with zero common mode input (both bases grounded), V_{OUT1} = V_{OUT2} = 6.378 V. This will be our baseline value.
To find the common mode output voltage for the other input conditions, we must first find the average of V_{OUT1} and V_{OUT2}, and then subtract our baseline voltage from that average. Thus, for this circuit, our common mode output voltage will be:
V_{OUT}(CM)  =  V_{OUT1} + V_{OUT2}  – 6.378 V 


2 
Then, we can easily calculate A_{cm} = V_{OUT}(CM)/V_{IN}(CM), and finally determine the circuit's common mode rejection ratio.
When we try this, we find that the common mode gain of this circuit remains very close to 0.497 regardless of the input voltages. However, as we see from the table above, difference mode gain is not constant, but changes as the differential input voltage changes. The highest differential gains occur when the input voltages are nearly the same. Under these conditions, with the component values and parameters used here, CMRR can get to be as high as 55 db, and will remain around 50 db or so. However, it will drop off rapidly as the differential input voltage exceeds about 0.1 V.
Also, of course, these calculations become meaningless if either transistor is driven into saturation or cutoff. If you try these calculations with input voltages of 3.0 and 3.1 volts for V_{IN1} and V_{IN2}, you'll find that V_{OUT2} is expected to be about 2 volts. This clearly won't work as intended.
All in all, while this circuit is useful to introduce the concept of a differential amplifier, it is not usually suitable for use in commercial or scientific applications, and is not at all suitable for use in an IC. We'll have to improve the circuit before we can use it to advantage.


 
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